Gap fill using carbon-based films

ABSTRACT

Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.

BACKGROUND

Semiconductor integration operations may involve filling high aspectratio gaps with insulating material. This is the case for shallow trenchisolation, inter-metal dielectric layers, passivation layers, and thelike. As device geometries shrink and thermal budgets are reduced,void-free filling of high aspect ratio (AR) gaps becomes increasinglydifficult due to limitations of existing deposition processes.

Most deposition methods deposit more material on the upper region thanon the lower region of a gap sidewall and may form “top-hats” at theentry of the gap. As a result, the top part of a high aspect ratiostructure sometimes closes prematurely leaving voids within the gap'slower portions. This problem is exacerbated in small gaps. Furthermore,as aspect ratios increase, the shape of the gap itself can contribute tothe problem. High aspect ratio gaps often exhibit reentrant features,which make gap filling even more difficult. A reentrant feature is afeature that narrows from the bottom of the gap. One such problematicreentrant feature is a narrowing at the top of the gap, with the gapsidewalls sloping inward near the top of the gap. For a given aspectratio feature, this increases the ratio of gap volume to gap access areaseen by the reactor species during deposition. Voids and seams formationis more likely under these conditions. If the top of the gap prematurelycloses off, the gap is re-opened before more film can be deposited inthe gap.

SUMMARY

Provided herein are methods and apparatuses for gap fill withcarbon-based films such as amorphous carbon and silicon carbides. Insome embodiments, the methods involve introducing a process gas to ahigh density plasma chemical vapor deposition (HDP CVD) chamber thathouses a substrate having a gap, where the process gas includes ahydrocarbon reactant and has a H:C ratio of at least 4:1, and fillingthe gap with a carbon-based film by an HDP CVD reaction of the processgas.

In some embodiments, the gap is filled in a single deposition operationwithout intervening etch operations. In some embodiments, the gap isfilled using two or more deposition operations and one or moreintervening etch operations. An intervening etch operation may beperformed in the HDP CVD chamber or in a separate etch chamber. In someembodiments, an intervening etch operation is a hydrogen-based etch.

In some embodiments, the carbon-based film is an amorphous carbon film.In such cases, the process gas may include the hydrocarbon reactant andan optional carrier gas. The process gas may consist essentially of thehydrocarbon reactant and an optional carrier gas. The process gas mayconsist essentially of the hydrocarbon reactant, molecular hydrogen orother hydrogen source, and an optional carrier gas. One or more dopantsmay also be present in the process gas.

In some embodiments, the carbon-based film is an amorphous carbide film.Examples include oxygen doped SiC, also known as silicon oxycarbide(SiOC), nitrogen doped SiC, also known as silicon nitricarbide (SiNC),oxygen and nitrogen doped SiC, also known as silicon oxynitricarbide(SiONC), boron doped carbide (SiBC), and undoped silicon carbide (SiC).In some embodiments, the process gas includes a silicon-containingreactant. The silicon-containing reactant may have an H:Si ration of atleast 4. In some cases, the process gas may include the hydrocarbonreactant, a silicon-containing reactant and an optional carrier gas. Theprocess gas may consist essentially of the hydrocarbon reactant, thesilicon-containing reactant and an optional carrier gas. The process gasmay consist essentially of the hydrocarbon reactant, thesilicon-containing reactant, molecular hydrogen or other hydrogensource, and an optional carrier gas. One or more dopants may also bepresent in the process gas.

In some embodiments, the hydrocarbon reactant has an H:C ratio of atleast 3:1 or at least 4:1. Examples include methane (CH₄). In someembodiments, the process gas includes molecular hydrogen (H₂). Themethod may include generating hydrogen radicals. In some embodiments,filling the gap includes a hydrogen radical etch during the HDP CVDreaction. Hydrogen radicals may etch deposited carbon-based material atthe top of the gap preferentially.

In some embodiments, an apparatus include a plasma generator, a chamberhaving a pedestal, one or more inlets to the chamber, and a controllerincluding machine-readable instructions for inletting a process gasincluding a process gas comprising a hydrocarbon reactant, wherein theprocess gas has a H:C ratio of at least 4:1 and generating a highdensity plasma in the chamber to thereby fill a gap on a substrate inthe chamber.

These and other aspects are described further below with reference tothe drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 provides a process flow diagram illustrating operations in anexample of a method of filling a gap according to various embodiments.

FIG. 2 depicts schematic cross-sectional diagrams of feature filled withSiC in a single deposition stage using acetylene as a carbon source(process gas He/SiH₄/C₂H₂) as compared to single stage feature fillusing methane as a carbon source (process gas He/SiH₄/CH₄).

FIG. 3 shows SEM images of 3:1 AR, 25 nm wide trenches filled with SiCusing acetylene and methane, respectively, as a carbon source in HDP CVDprocesses similar to those depicted schematically in FIG. 2.

FIG. 4 shows a cross-sectional schematic diagram and counterpart SEMimages of 3:1 AR, 25 nm features filled with amorphous carbon using aHe/CH₄ process gas in a HDP CVD process at various stages during thedeposition.

FIG. 5 provides a process flow diagram illustrating operations in anexample of a method of filling a gap according to various embodiments.

FIG. 6 provides a simple block diagram depicting various reactorcomponents arranged as may be arranged in a reactor.

FIG. 7 is a block diagram of a system suitable for conducting adeposition process in accordance with disclosed embodiments.

FIG. 8 provides an example of operations including carbon-based gap fillin a self-aligned contact integration process.

DETAILED DESCRIPTION

Semiconductor integration operations may involve filling high aspectratio gaps with various materials. This is the case for shallow trenchisolation, inter-metal dielectric layers, passivation layers, and thelike. As device geometries shrink and thermal budgets are reduced,void-free filling of high aspect ratio (AR) gaps becomes increasinglydifficult due to limitations of existing deposition processes.

Provided herein are methods of filling gaps using high density plasmachemical vapor deposition (HDP CVD). According to variousimplementations, carbon-containing films such as amorphous carbon andamorphous carbide films are deposited by HDP CVD into gaps on substratesto fill the gaps. The methods may involve using high hydrogen-contentprocess gasses during HDP CVD deposition to provide bottom-up fill. Alsoprovided are related apparatus.

Most deposition methods deposit more material on the upper region thanon the lower region of a gap sidewall and may form “top-hats” at theentry of the gap. As a result, the top part of a high aspect ratiostructure sometimes closes prematurely leaving voids within the gap'slower portions. This problem is exacerbated in small gaps. Furthermore,as aspect ratios increase, the shape of the gap itself can contribute tothe problem. High aspect ratio gaps often exhibit reentrant features,which make gap filling even more difficult. A reentrant feature is afeature that narrows from the bottom of the gap. One such problematicreentrant feature is a narrowing at the top of the gap, with the gapsidewalls sloping inward near the top of the gap. For a given aspectratio feature, this increases the ratio of gap volume to gap access areaseen by the precursor species during deposition. Voids and seamsformation is more likely under these conditions. If the top of the gapprematurely closes off, the gap is re-opened before more film can bedeposited in the gap.

HDP CVD is a directional CVD process that involves directing chargeddielectric precursor species toward a substrate. Although HDP CVD is notpurely an isotropic, diffusion-based process, some overhang or top-hatformation may still result at the entry region of the gap to be filled.This may result from the non-directional deposition reactions of neutralspecies in the plasma reactor and from sputtering and redepositionprocesses. The directional aspect of the deposition process producessome high momentum charged species that sputter away bottom fill. Thesputtered material tends to redeposit on the sidewalls. Limitations dueto overhang formation become ever more severe as the width of the gap tobe filled decreases and the aspect ratio increases. According to variousembodiments, the methods provided herein provide gap fill by suppressingre-entrant feature formation using a hydrogen-rich process gas.

In embodiments of the methods provided herein, a gap is filled with anamorphous carbon-containing material such as amorphous carbon (a-C) andamorphous carbides including amorphous silicon carbides (a-SiC). Classesof SiC include oxygen doped SiC, also known as silicon oxycarbide(SiOC), nitrogen doped SiC, also known as silicon nitricarbide (SiNC),oxygen and nitrogen doped SiC, also known as silicon oxynitricarbide(SiONC), boron doped carbide (SiBC), and undoped silicon carbide (SiC).For example, a trench on a topological substrate may be filled with ana-C film that acts as a sacrificial hardmask in a pattern transferscheme. a-SiC and other amorphous carbide layers may be used, forexample, as barrier layers in VLSI backend processes. In someintegration schemes, void-free gap fill of SiC or other carbide films isuseful. FIG. 8 provides an example of operations including carbon-basedgap fill in a self-aligned contact integration process. A metal gate 801and spacers 802 are depicted in FIG. 8. The metal gate 801 is recessed,forming a gap 804 between the spacers. A gate cap 803, which may be forexample a SiC film, is deposited in the gap 804 prior to definition ofthe contact holes. The presence of the gate cap 803 relaxes thealignment precision for contact hole definition; in FIG. 8, contact hole805 is within the increased tolerance provided by the gate cap 803.

FIG. 1 provides a process flow diagram illustrating operations in anexample of a method of filling a gap according to various embodiments.The process 100 involves providing a substrate including a gap to a HDPCVD chamber. Block 101. HDP CVD chambers are discussed further belowwith respect to FIG. 6. The substrate may be a wafer suitable forsemiconductor processing, such as a 200 mm, 300 mm or 450 mm siliconwafer. Wafers of different compositions and/or sizes may be used.Further, the methods are not limited to semiconductor substrates, butmay be implemented with any appropriate substrate that includes a gap tobe filled, including glass and plastic panels and the like.

A hydrogen (H)-rich process gas is introduced to the HDP CVD chamber.Block 103. According to various embodiments, block 103 can involve oneor both of using H-rich reactants and introducing hydrogen (H₂) to thechamber in addition to reactants. The term process gas is used to denotemultiple component gases or a mixture thereof that is introduced to thechamber. In some embodiments, a process gas can include a liquidreactant entrained in a carrier gas or otherwise provided to thechamber. The process gas includes one or more carbon reactants to supplycarbon to the carbon-based gap fill material, and as appropriate one ormore co-reactants such as silicon-containing compounds,nitrogen-containing compounds, boron-containing compounds, and the like.

According to various embodiments, an H-rich process gas may becharacterized by one or more of the following: an H:C ratio of at least3:1, an H:C ratio of more than 3:1, or at H:C ratio of at least 4:1. Insome embodiments, a carbon precursor having an H:C ratio of at least3:1, an H:C ratio of more than 3:1, or at H:C ratio of at least 4:1 isused. Examples include ethane (C₂H₆) and methane (CH₄). Carbonprecursors that have lower H:C ratios may be used with the addition ofH₂ or hydrogen from another source. For example, a process gas mayinclude acetylene (C₂H₂) and H₂. A process gas may include an inertcarrier gas, with examples including helium (He), argon (Ar), and thelike.

As noted above, a process gas may include one or more additionalreactants depending on the type of film being deposited. For siliconcarbides including SiC, SiCN, SiBC, etc., a silicon-containing reactantsuch as one or more silanes may be used as a silicon source. Often, thesilicon-containing reactant does not include carbon. Non-limitingexamples of silanes include silane, disilane, trisilane, and highersilanes.

Other silicon-containing reactants may be used as appropriate, includingsiloxanes, alkyl silanes, alkoxy silanes, and amino silanes, amongothers. Non-limiting examples of alkyl silanes include dimethylsilane,trimethylsilane, tetramethylsilane, triethylsilane, andpentamethyldisilamethane. Silicon-carbon-containing films also includingoxygen atoms (e.g., silicon-carbon-oxides andsilicon-carbon-oxynitrides) may be formed using an organosiliconreactant that includes oxygen, such as siloxanes and alkoxy silanes.Non-limiting examples of siloxanes include cyclotetrasiloxanes (e.g.,2,4,6,8-tetramethylcyclotetrasiloxane; octamethylcyclotetrasiloxane; andheptamethylcyclotetrasiloxane); other cyclic siloxanes; siloxanes havingthree-dimensional or caged structures (i.e., where silicon atoms arebridged with one another via oxygen atoms, forming a three-dimensionalstructure or a polyhedron) such as silsequioxane; and linear siloxanes,such as disiloxanes (e.g., pentamethyldisiloxane, tetramethyldisiloxane,and hexamethyl trisiloxane). Non-limiting examples of alkoxy silanesinclude methoxysilane, dimethoxysilane, trimethoxysilane,methyldimethoxysilane, diethoxymethylsilane, dimethylethoxysilane, anddimethylmethoxysilane. Silicon-carbon-containing films also includingnitrogen atoms (e.g., silicon-carbon-nitrides andsilicon-carbon-oxynitrides) may be formed using an organosiliconreactant that includes nitrogen, such as amino silanes and silazanes.Non-limiting examples of amino silanes include2,2-bis(dimethylamino)-4,4-dimethyl-2,4-disilapentane,2,2,4-trimethyl-4-dimethylamino-3,4-disilapentane,dimethylaminodimethylsilane, bis(dimethylamino)methylsilane, andtris(dimethylamino)silane. 1,1,3,3-tetramethyldisilazane is anon-limiting example of a silazane.

According to various embodiments, a silicon-containing reactant and ahydrocarbon may be provided to the chamber in an approximately 1:1 ratioto fill the gap. This includes ratios between 1:1.5 and 1.5:1. In somecases, the ratio is between 1:1.25 and 1.25:1, or between 1:1.1 and1.1:1. In some embodiments, the silicon-containing reactant is hydrogenrich, having a H:Si ratio of at least 3:1 or at least 4:1.

Non-limiting examples of hydrogen-rich process gases for depositing a-Cfilms include He/CH₄, He/C₂H₂/H₂, He/CH₄/H₂, and He/C₂H₆/H₂.Non-limiting examples of hydrogen-rich process gases for depositinga-SiC films include He/SiH₄/CH₄, He/SiH₄/C₂H₂/H₂, He/SiH₄/CH₄/H₂, andHe/SiH4/C2H6/H₂. Any appropriate carrier gas may be used in addition toor instead of He in these examples. Similarly, any appropriatesilicon-containing reactant may be used instead or in addition to SiH₄in these examples.

A carbon-based film is then deposited to fill the gap. Block 105.According to various embodiments, filling the gap may be performed in asingle deposition or in multiple depositions separated by intervening anetch operation. An example of the latter technique is described belowwith respect to FIG. 5.

By using a hydrogen-rich carbon precursor in a HDP CVD deposition,bottom-up gap fill may be provided. This is schematically represented inFIG. 2, which depicts cross-sectional diagrams of a feature filled withSiC in a single deposition stage using acetylene as a carbon source(process gas He/SiH₄/C₂H₂) as compared to single stage feature fillusing methane as a carbon source (He/SiH₄/CH₄). Process 210 depictstrench 201 during SiC deposition from He/SiH₄/C₂H₂. As the depositionproceeds, a cusp 204 forms. This leads to the closing off of the top 205of the trench 201, which in turn results in a void 203. In comparison,process 220 using a He/SiH₄/CH₄ process gas results in bottom-up fillwithout void formation. As the deposition progresses, a cusp issuppressed at 206, allowing the trench to remain open and providingvoid-free fill. FIG. 3 shows SEM images of 3:1 AR, 25 nm wide trenchesfilled with SiC using acetylene (image 310) and methane (image 320),respectively, as carbon sources in HDP CVD processes similar to thosedepicted schematically in FIG. 2. Voids 303 can be seen in image 310. Bycontrast, the trenches filled using methane are void-free.

A similar effect is observed in depositing a-C films in trenches. FIG. 4shows a cross-sectional schematic diagram and counterpart SEM images of3:1 AR, 25 nm trenches 401 filled using a He/CH₄ process gas in a HDPCVD process at various stages during the deposition. The deposition maybe characterized as largely bottom-up, resulting in trenches filled withvoid-free a-C. By contrast, a He/C₂H₂ process gas results in voidformation due to sidewall cusp development and premature gap closure(not shown).

Without being bound by a particular theory, it is believed that cuspsuppression is due to etch by H species such as hydrogen radicals (i.e.,atomic H) at the top of the gap during deposition. Neutral and low massspecies in the plasma preferentially etch at the top of the gap,allowing fill in the bottom part of the feature and etch at the top.This effect can counteract the above-described factors that lead to cuspdeposition.

Gap fill of carbon-based films using non-hydrogen enriched processgases, other hydrocarbon precursors, or other techniques such asplasma-enhanced chemical vapor deposition (PECVD) does not exhibit thesame cusp suppression that is exhibited by the hydrogen-enriched HDP CVDprocesses. As such, they cannot be used for high quality, void free,single stage gap fill.

In some embodiments, the methods may include one or moredeposition-etch-deposition cycles. Such a process may be used, forexample, to fill particularly challenging structures. FIG. 5 provides aprocess flow diagram illustrating operations in an example of a methodof filling a gap according to various embodiments.

As shown, a deposition process 500 begins at block 101 in which asubstrate containing a gap is provided to a HDP CVD reaction chamber.This operation may be performed as described above with respect toFIG. 1. A H-rich process gas is then introduced to the HDP CVD chamber.Block 103. This may also be performed as described above with respect toFIG. 1.

A carbon-based film is then deposited to partially fill the gap. Block505. Deposition is stopped prior to closure of the gap. In someembodiments, the deposited film may exhibit nascent cusp formation, are-entrant profile, or otherwise present a challenging-to-fillstructure. While any cusp formation will be less than in the absence ofa hydrogen-rich process gas, it may be useful to halt the deposition andemploy a dedicated etch operation to appropriately tailor the profile ofthe film partially filling the gap.

At 507, reactant flow is turned off and the carbon-based film is etched.Because the reactant flow is turned off, the deposition is halted. Insome embodiments, hydrogen radicals or other hydrogen species are theprimary etchant. In some such embodiments, transitioning from block 505to block 507 may involve turning off one or more reactant flows whileallowing H₂ to continue to flow. While block 507 may occur in the HDPCVD reactor in some embodiments, the substrate may also be transferredto an etch chamber to be etched. Any appropriate etchant may be used,including a fluorine-based etch, etc. One or more additional etchantgases may be added to hydrogen in hydrogen-based etches. Alternatively,hydrogen species may be the sole etchants, with no halogen etchants.

Block 507 may involve preferentially etching material at the top of thegap to appropriately shape the profile of the material in the gap. Thismay be referred to as a non-conformal etch or low-step coverage etch.Step coverage of the carbon-based film may be proportional to (etchantconcentration)/etch rate. For example, for hydrogen radical etching, athigher temperatures, hydrogen radicals readily react and etch at thefeature entrance, resulting in a more non-conformal etch; at lowertemperature, the hydrogen radicals may be able to diffuse and etchfurther into the feature, resulting in a more conformal etch. Higheretchant flow rate will result in more etchant species generated, causingmore species to diffuse and etch further into the feature, resulting ina more conformal etch. Lower etchant flow rate will result in feweretchant species generated, which will tend to react and etch at thefeature entrance, resulting in a more non-conformal etch.

At block 509, carbon-based film is deposited in the gap, this time onthe etched carbon-based film that partially fills the gap. Block 509typically involves HDP CVD deposition using a hydrogen-rich process gasas described above. In some embodiments, the gap may be filled after onedep-etch-dep sequence. Alternatively, blocks 507 and 509 can be repeatedone or more times to fill the gap. Block 511.

In alternative embodiments, carbon-based gap fill may be performed byusing a nitrogen-rich process gas. For example, a hydrogen-rich orcarbon-rich hydrocarbon precursor as described above may be mixed withnitrogen (N₂).

Apparatus

The present invention may be implemented in a HDP CVD reactor. Such areactor may take many different forms. Generally, the apparatus willinclude one or more chambers or “reactors” (sometimes including multiplestations) that house one or more wafers and are suitable for waferprocessing. Each chamber may house one or more wafers for processing.The one or more chambers maintain the wafer in a defined position orpositions (with or without motion within that position, e.g. rotation,vibration, or other agitation). While in process, each wafer is held inplace by a pedestal, wafer chuck and/or other wafer holding apparatus.For certain operations in which the wafer is to be heated, the apparatusmay include a heater such as a heating plate. An examples of a suitablereactor is the Speed™ reactor, available from Lam Research of Fremont,Calif.

FIG. 6 provides a simple block diagram depicting various reactorcomponents arranged as may be arranged in a reactor. As shown, a reactor601 includes a process chamber 603 which encloses other components ofthe reactor and serves to contain the plasma. In one example, theprocess chamber walls are made from aluminum, aluminum oxide, and/orother suitable material. The embodiment shown in FIG. 6 has two plasmasources: top RF coil 605 and side RF coil 607. Top RF coil 605 is amedium frequency (MFRF) coil and side RF coil 607 is a low frequency(LFRF) coil. In the embodiment shown in FIG. 6, MFRF frequency may befrom 430-470 kHz and LFRF frequency from 340-370 kHz. However, themethods and apparatus are not limited to operation in reaction chamberswith dual sources, these frequencies, or RF plasma sources. Any suitableplasma source or sources may be used.

Within the reactor, a wafer pedestal 609 supports a substrate 611. Thepedestal typically includes a chuck (sometimes referred to as a clamp)to hold the substrate in place during the deposition reaction. The chuckmay be an electrostatic chuck, a mechanical chuck or various other typesof chuck as are available for use. A heat transfer subsystem including aline 613 for supplying heat transfer fluid controls the temperature ofsubstrate 611. The wafer chuck and heat transfer fluid system canfacilitate maintaining the appropriate wafer temperatures.

A high frequency RF of HFRF source 615 serves to electrically biassubstrate 611 and draw charged reactant species onto the substrate forthe deposition reaction. Electrical energy from source 615 is coupled tosubstrate 611 via an electrode or capacitive coupling, for example. Notethat the bias applied to the substrate need not be an RF bias. Otherfrequencies and DC bias may be used as well.

The hydrogen-rich process gas is introduced via one or more inlets 617.The component gases of the process gas may be premixed or not. In someembodiments, the process gas is introduced through a gas supply inletmechanism including orifices. In some embodiments, at least some of theorifices orient the process gas along an axis of injection intersectingan exposed surface of the substrate at an acute angle. Further, the gasor gas mixtures may be introduced from a primary gas ring 621, which mayor may not direct the gases toward the pedestal. In some embodiments,gases may be introduced from one or more gas rings (not shown) inaddition to the primary gas ring 621. Injectors may be connected to theprimary gas ring 621 to direct at least some of the gases or gasmixtures into the chamber and toward the pedestal. Note that injectors,gas rings or other mechanisms for directing process gas toward the wafermay not be used in some embodiments; any appropriate process gasdelivery system may be employed. The sonic front caused by a process gasentering the chamber will itself cause the gas to rapidly disperse inall directions—including toward the substrate. Process gases exitchamber 603 via an outlet 622. A vacuum pump (e.g., a turbomolecularpump) typically draws process gases out and maintains a suitably lowpressure within the reactor. The reactor 601 may be controlled using acontroller 690. The controller 690 may include machine-readableinstructions for performing various operations disclosed herein. Furtherdescription regarding the controller 690 is provided below.

In some embodiments, an HDP CVD reactor, such as the reactor 601 shownin FIG. 6 is part of a tool for processing one or more wafers. Anexample of a tool including one or more reactors is provided in FIG. 7.FIG. 7 is a block diagram of a system suitable for conducting adeposition process in accordance with disclosed embodiments. The system700 includes a transfer module 703, such as the wafer transfer system(WTS) used on the SPEED™ platform available from Lam ResearchCorporation of Fremont, Calif. The transfer module 703 provides a clean,pressurized environment to minimize the risk of contamination ofworkpieces, such as wafers, being processed as they are moved betweenthe various processing stages. Mounted on the transfer module 703 areone or more HDP CVD modules or process chambers 705, such as Lam SPEED™reactors, available from Lam Research Corporation of Fremont, Calif.Also mounted on the transfer module 703 are one or more etch chambers707. Examples of etch chambers include a Lam atomic layer removal (ALR)reactor or Kiyo™ reactor. These etch chambers may be mounted on the sameor separate platforms as the one or more deposition reactors.

The system 700 also includes one or more (in this case two) wafer sourcemodules 701 where wafers are stored before and after processing. Adevice (generally a robot arm unit) in the transfer module 703 moves thewafers among the modules mounted on the transfer module 703.

Wafers are transferred by the robot arm between the HDP CVD reactor 705and/or the etch chamber 707 for deposition and etch back processing,respectively. In one embodiment, a single etch reactor can support twoSPEED deposition modules 705 with a high throughput of about 15-16wafers per hour (wph). In other embodiments, two etch reactors 707 maysupport one or more SPEED deposition modules 705.

Disclosed embodiments may also be practiced without a plasma etchchamber. For example, a single chamber may be configured for both HDPCVD deposition and etch. For example, the Lam SPEED HDP-CVD reactors arecapable of deposition and etch with a throughput similar to that ofusing separate reactors. Given the details and parameters providedherein, a single chamber may be configured, for example, a plasmareactor, with equipment, for example the various plasma sourcesdescribed herein, for deposition (HDP CVD) and a reactive plasma etch(e.g., in-situ or downstream plasma source).

FIG. 7 also depicts an embodiment of a system controller 750 employed tocontrol process conditions and hardware states of process tool 700. Thesystem controller 750 may provide program instructions for implementingthe above-described processes. The program instructions may control avariety of process parameters, such as DC power level, RF bias powerlevel, pressure, temperature, etc. The instructions may control theparameters to perform deposition operations according to variousembodiments described herein.

In some implementations, a controller 750 is part of a system, which maybe part of the above-described examples. Such systems can comprisesemiconductor processing equipment, including a processing tool ortools, chamber or chambers, a platform or platforms for processing,and/or specific processing components (a wafer pedestal, a gas flowsystem, etc.). These systems may be integrated with electronics forcontrolling their operation before, during, and after processing of asemiconductor wafer or substrate. The electronics may be referred to asthe “controller,” which may control various components or subparts ofthe system or systems. The controller 750, depending on the processingrequirements and/or the type of system, may be programmed to control anyof the processes disclosed herein, including the delivery of processinggases, temperature settings (e.g., heating and/or cooling), pressuresettings, vacuum settings, power settings, radio frequency (RF)generator settings, RF matching circuit settings, frequency settings,flow rate settings, fluid delivery settings, positional and operationsettings, wafer transfers into and out of a tool and other transfertools and/or load locks connected to or interfaced with a specificsystem.

Broadly speaking, the controller 750 may be defined as electronicshaving various integrated circuits, logic, memory, and/or software thatreceive instructions, issue instructions, control operation, enablecleaning operations, enable endpoint measurements, and the like. Theintegrated circuits may include chips in the form of firmware that storeprogram instructions, digital signal processors (DSPs), chips defined asapplication specific integrated circuits (ASICs), and/or one or moremicroprocessors, or microcontrollers that execute program instructions(e.g., software). Program instructions may be instructions communicatedto the controller in the form of various individual settings (or programfiles), defining operational parameters for carrying out a particularprocess on or for a semiconductor wafer or to a system. The operationalparameters may, in some embodiments, be part of a recipe defined byprocess engineers to accomplish one or more processing steps during thefabrication of one or more layers, materials, metals, oxides, silicon,silicon dioxide, surfaces, circuits, and/or dies of a wafer.

In some embodiments, the system controller 750 controls all of theactivities of process tool 700. The system controller 750 may includeone or more memory devices 756, one or more mass storage devices 754,and one or more processors 752. A processor 752 may include a CPU orcomputer, analog and/or digital input/output connections, stepper motorcontroller boards, etc. The system controller 750 executes systemcontrol software 758 stored in a mass storage device 754, loaded intomemory device 756, and executed on processor 752. Alternatively, thecontrol logic may be hard coded in the controller 750. ApplicationsSpecific Integrated Circuits, Programmable Logic Devices (e.g.,field-programmable gate arrays, or FPGAs) and the like may be used forthese purposes. In the following discussion, wherever “software” or“code” is used, functionally comparable hard coded logic may be used inits place. System control software 758 may include instructions forcontrolling the transfer of wafers into and out of a process chamber,timing of gases, mixture of gases, amount of gas flow, chamber and/orstation pressure, chamber and/or reactor temperature, wafer temperature,bias power, target power levels, RF power levels, pedestal, chuck and/orsusceptor position, and other parameters of a particular processperformed by process tool 700. The system control software 758 may beconfigured in any suitable way. For example, various process toolcomponent subroutines or control objects may be written to controloperation of the process tool components necessary to carry out variousprocess tool processes. System control software 758 may be coded in anysuitable computer readable programming language.

The controller 750, in some implementations, may be a part of or coupledto a computer that is integrated with, coupled to the system, otherwisenetworked to the system, or a combination thereof. For example, thecontroller 750 may be in the “cloud” or all or a part of a fab hostcomputer system, which can allow for remote access of the waferprocessing. The computer may enable remote access to the system tomonitor current progress of fabrication operations, examine a history ofpast fabrication operations, examine trends or performance metrics froma plurality of fabrication operations, to change parameters of currentprocessing, to set processing steps to follow a current processing, orto start a new process. In some examples, a remote computer (e.g. aserver) can provide process recipes to a system over a network, whichmay include a local network or the Internet. The remote computer mayinclude a user interface that enables entry or programming of parametersand/or settings, which are then communicated to the system from theremote computer. In some examples, the controller 750 receivesinstructions in the form of data, which specify parameters for each ofthe processing steps to be performed during one or more operations. Itshould be understood that the parameters may be specific to the type ofprocess to be performed and the type of tool that the controller isconfigured to interface with or control. Thus as described above, thecontroller 750 may be distributed, such as by including one or morediscrete controllers that are networked together and working towards acommon purpose, such as the processes and controls described herein. Anexample of a distributed controller for such purposes would be one ormore integrated circuits on a chamber in communication with one or moreintegrated circuits located remotely (such as at the platform level oras part of a remote computer) that combine to control a process on thechamber.

In some embodiments, system control software 758 may includeinput/output control (IOC) sequencing instructions for controlling thevarious parameters described above. Other computer software and/orprograms stored on mass storage device 754 and/or memory device 756associated with system controller 750 may be employed in someembodiments. Examples of programs or sections of programs for thispurpose include a wafer positioning program, a process gas controlprogram, a pressure control program, a heater control program, and aplasma control program.

A wafer positioning program may include program code for process toolcomponents that are used to load a wafer onto pedestal 718. A processgas control program may include code for controlling gas composition(e.g., process gases, helium gas or carrier gases, etc., as describedherein) and flow rates and optionally for flowing gas into one or moreprocess chambers or stations prior to deposition in order to stabilizethe pressure therein. A pressure control program may include code forcontrolling the pressure in the process chamber by regulating, forexample, a throttle valve in the exhaust system of the process chamber,a gas flow into the process chamber, etc.

A heater control program may include code for controlling the current toa heating unit that is used to heat the wafer or other workpiece.Alternatively, the heater control program may control delivery of a heattransfer gas (such as helium) to the wafer. A plasma control program mayinclude code for setting RF power levels applied to the processelectrodes and the bias in one or more process chambers or stations inaccordance with the embodiments herein. A pressure control program mayinclude code for maintaining the pressure in the reaction chamber inaccordance with the embodiments herein.

In some embodiments, there may be a user interface associated withsystem controller 750. The user interface may include a display screen,graphical software displays of the apparatus and/or process conditions,and user input devices such as pointing devices, keyboards, touchscreens, microphones, etc.

In some embodiments, parameters adjusted by system controller 750 mayrelate to process conditions. Non-limiting examples include process gascomposition and flow rates, temperature, pressure, plasma conditions(such as RF bias power levels), pressure, temperature, etc. Theseparameters may be provided to the user in the form of a recipe, whichmay be entered utilizing the user interface.

Signals for monitoring the process may be provided by analog and/ordigital input connections of system controller 750 from various processtool sensors. The signals for controlling the process may be output onthe analog and digital output connections of process tool 700.Non-limiting examples of process tool sensors that may be monitoredinclude mass flow controllers, pressure sensors (such as manometers),thermocouples, etc. Appropriately programmed feedback and controlalgorithms may be used with data from these sensors to maintain processconditions.

Without limitation, example systems may include a plasma etch chamber ormodule, a deposition chamber or module, a spin-rinse chamber or module,a metal plating chamber or module, a clean chamber or module, a beveledge etch chamber or module, a physical vapor deposition (PVD) chamberor module, a chemical vapor deposition (CVD) chamber or module, anatomic layer deposition (ALD) chamber or module, an atomic layer etch(ALE) chamber or module, an ion implantation chamber or module, a trackchamber or module, and any other semiconductor processing systems thatmay be associated or used in the fabrication and/or manufacturing ofsemiconductor wafers.

As noted above, depending on the process step or steps to be performedby the tool, the controller might communicate with one or more of othertool circuits or modules, other tool components, cluster tools, othertool interfaces, adjacent tools, neighboring tools, tools locatedthroughout a factory, a main computer, another controller, or tools usedin material transport that bring containers of wafers to and from toollocations and/or load ports in a semiconductor manufacturing factory.

Process Parameters

As noted above, gap fill is performed by HDP CVD. HDP CVD as used hereinis distinct from plasma-enhanced chemical vapor deposition techniques,also known as PECVD. HDP CVD reactors typically employinductively-coupled plasmas, while PECVD reactors typically employcapacitively-coupled plasmas. HDP CVD process conditions and resultingfilms are different PECVD processes. For example, various HDP reactorsas described herein operate at a pressure less than about 100 mTorr witha plasma density greater than 10¹⁷ ions/m³, e.g., 10¹⁷ ions/m³ to 10¹⁹ions/m³. By contrast, PECVD processes operate at much higher pressureswith much lower plasma densities, e.g., 10¹⁴ ions/m³ to 10¹⁶ ions/m³.

HDP reactors may ignite plasma at a plasma frequency of 400 kHz forcoils and a frequency of 13.56 MHz for the pedestal where the wafer isplaced. By contrast, an a capacitively-coupled plasma reactor, a plasmafrequency of 13.56 MHz is used to generate plasma as applied to either ashowerhead or the pedestal, and 400 kHz is applied to either theshowerhead or the pedestal. Ion energies in HDP reactors may be greaterthan in PECVD reactors. As a result, film composition andcharacteristics of films deposited in HDP CVD reactors are differentthan those deposited in PECVD reactors. For carbon-based gap fill, thelower plasma densities in PECVD typically cannot generate hydrogenradicals in an amount effective to suppress cusp formation even usinghydrogen-rich process gases.

The plasma source power is high enough to sustain a plasma and lowenough so that the effect of the H⁺ ions does not overwhelm that of thehydrogen radicals. Note that the RF power will depend on the substratesize (e.g., 200 mm, 300 mm, or 450 mm diameter wafer) and therequirements of the specific process being used. An example range isbetween about 3000 W and 6000 W for a 300 mm wafer, with plasma powerscaling with substrate surface area.

Substrate temperature and chamber pressure during may be generally withthe ranges commonly used during HDP CVD processes. Temperature valuesmay range from about 200° C. and 1000° C., with typical ranges betweenabout 300° C. and 550° C., e.g., 400° C. Pressure is typicallymaintained at a value below 500 mTorr, and can be significantly lower,e.g., below 100 mTorr or 10 mTorr. In one example, pressure is 6 mTorr.

While the methods may be practiced on any substrate in which it isdesirable to fill a gap with carbon-based material, they areparticularly applicable to filling gaps having one or more of highaspect ratios and narrow widths. Example aspect ratios may range from3:1 to 30:1, or 3:1 to 10:1. Example trench widths may range from 10 nmto 100 nm, for example 50 nm or less, or 25 nm or less.

A HFRF power source or other source may be used to bias the substrate.Substrates are typically biased during deposition operations to directcharged species downward, to the bottom of the gap. As discussed above,it is believed that the hydrogen-rich process gas improves gap fill by achemical etch at the top of the gap. During a dedicated etch processsuch as block 507, the substrate may or may not be biased. Example HFbias powers during HDP CVD are between 0 to 9500 W about for a 300 mmsystem, with bias power scaling with substrate surface area.

Although the foregoing embodiments have been described in some detailfor purposes of clarity of understanding, it will be apparent thatcertain changes and modifications may be practiced within the scope ofthe appended claims. It should be noted that there are many alternativeways of implementing the processes, systems, and apparatus of thepresent embodiments. Accordingly, the present embodiments are to beconsidered as illustrative and not restrictive, and the embodiments arenot to be limited to the details given herein.

1. A method comprising: introducing a process gas to a high density plasma chemical vapor deposition (HDP CVD) chamber that houses a substrate having a gap, wherein the process gas includes a hydrocarbon reactant and has a H:C ratio of at least 4:1; and filling the gap with a carbon-based film by an HDP CVD reaction of the process gas.
 2. The method of claim 1, wherein the gap is filled in a single deposition operation with no intervening etch operations.
 3. The method of claim 1, wherein the carbon-based film is an amorphous carbon (a-C) film.
 4. The method of claim 1, wherein the carbon-based film is an amorphous carbide film.
 5. The method of claim 4, wherein the carbon-based film is a doped or undoped amorphous silicon carbide film.
 6. The method of claim 5, wherein the process gas includes a silicon-containing reactant having a H:Si ratio of at least
 4. 7. The method of claim 1, wherein the hydrocarbon reactant has a H:C ratio of at least 3:1.
 8. The method of claim 7, wherein the hydrocarbon reactant has a H:C ratio of at least 4:1.
 9. The method of claim 1, wherein the process gas includes molecular hydrogen (H₂).
 10. The method of claim 1, further comprising generating a plasma including hydrogen radicals.
 11. The method of claim 1, wherein the filling the gap comprises a hydrogen radical etch at the top of the gap during the HDP CVD reaction.
 12. The method of claim 1, wherein filling the gap with a carbon-based film comprises two or more deposition stages and one or more intervening etch operations.
 13. The method of claim 12, wherein the one or more intervening etch operations are hydrogen-based etches.
 14. An apparatus comprising: a plasma generator; chamber comprising a pedestal; one or more inlets to the chamber; and a controller comprising machine-readable instructions for: inletting a process gas comprising a hydrocarbon reactant, wherein the process gas has a H:C ratio of at least 4:1; and generating a high density plasma in the chamber to thereby fill a gap on a substrate in the chamber.
 15. The apparatus of claim 14, wherein the hydrocarbon reactant has a H:C ratio of at least 3:1.
 16. The apparatus of claim 14, wherein the hydrocarbon reactant has a H:C ratio of at least 4:1.
 17. The apparatus of claim 14, wherein the process gas includes a silicon-containing reactant having a H:Si ratio of at least
 4. 18. The apparatus of claim 14, wherein the process gas includes molecular hydrogen (H₂). 